Current Projects
DEFLECTOR – Digital Vehicle Monitoring and Real-Time Performance Tracking with a Focus on Retrofitting
The DEFLECTOR project investigates solutions for the digital condition monitoring of existing vehicles. The aim is to capture vehicle conditions more effectively using additional sensor technology, wireless communication, and data-driven analysis methods, and to make this information usable for the planning and optimisation of maintenance processes.
LINK: https://www.bmv.de/SharedDocs/DE/Artikel/mFUND/Projekte/deflector.htm
Mittelstand-Digital Zentrum Spreeland
The Mittelstand-Digital Zentrum Spreeland supports small and medium-sized enterprises in their digital transformation. The focus is on practice-oriented services and demonstrators in the areas of digitalisation, IT security, artificial intelligence, assistance systems, automation, robotics, and digital production processes.
LINK: https://www.digitalzentrum-spreeland.de/
D4M – Participation in the Project “Intelligent Order Planning and Control in the Maintenance of Public Transport Vehicles”
As part of the D4M project, the Chair of Wireless Systems contributes to data-driven and AI-supported planning of maintenance processes in public transport. The project aims to develop suitable data models and AI-based methods to better predict maintenance needs and support workshop control.
LINK: https://www.bmv.de/SharedDocs/DE/Artikel/mFUND/Projekte/d4m.html
AI-DISCO – Edge-Cloud AI for Distributed Sensing and Computing
AI-DISCO investigates an edge/cloud platform for distributed, energy-efficient, and secure AI processing. The project combines reconfigurable edge nodes, RISC-V processor cores, AI accelerators, intelligent sensor technology, and distributed learning methods to enable efficient and application-oriented processing of sensor data.
LINK: https://www.elektronikforschung.de/projekte/ai-disco
ODE4EC-PIV – Open Design Ecosystem for European Chips: Productivity, Interoperability, Verification
ODE4EC-PIV is part of the European ODE4EC initiative and addresses open tools for more productive chip design, the integration of different design flows, and the verification of chip designs. The aim is to strengthen open and accessible development environments for research, teaching, and industrial applications within the European chip design ecosystem.