11158 - Hardware Test and Fault Tolerant Computing Modulübersicht

Module Number: 11158 - Phase-out Module
Module Title:Hardware Test and Fault Tolerant Computing
  Hardware Test und Fehlertoleranz
Department: Faculty 1 - Mathematics, Computer Science, Physics, Electrical Engineering and Information Technology
Responsible Staff Member:
  • Dr.-Ing. Reichenbach, Marc
Language of Teaching / Examination:English
Duration:6 semesters
Frequency of Offer: On special announcement
Credits: 6
Learning Outcome:Candidates will get an overview over state-of-the-art test and fault tolerant computing methods.
Contents:The module consists of several tutorials, composed according to demand and availability, list or courses is available and updated (see attachment to programme of studies).
Recommended Prerequisites:Diploma / Master in computer science, computer engineering or electrical engineering.
Mandatory Prerequisites:None
Forms of Teaching and Proportion:
  • Tutorial / 20 Hours
  • Seminar / 20 Hours
  • Self organised studies / 140 Hours
Teaching Materials and Literature:Students get web-access to available materials from all related courses.
Module Examination:Final Module Examination (MAP)
Assessment Mode for Module Examination:
  • Oral examination, 30 min. OR
  • Presentation and interview covering a set of tutorials, 60 min.
The actual form of the examination will be anounced at the beginning of the course.
Evaluation of Module Examination:Performance Verification – graded
Limited Number of Participants:None
Part of the Study Programme:
  • Structural Doctoral Programme / Dependable Systems / PO 2012
Remarks:Module content can be composed according to available tutorials.
Module Components:Block tutorials offered within the PhD net programme of studies, list is published and updated.
  • On-Line Error Detection and Compensation (Basic), M. Gössel, Universität Potsdam
  • Faults and Fault Mechanisms (Introduction), H.T. Vierhaus, Brandenburgische Technische Universität Cottbus
  • Test Technology for Digital Circuits and Systems, H.T. Vierhaus, Brandenburgische Technische Universität Cottbus
  • Design for Test and Diagnosis, H.T. Vierhaus, Brandenburgische Technische Universität Cottbus
  • Fault Injection and Fault Simulation Technology, NN, Tallinn University of Technology
Components to be offered in the Current Semester:
  • no assignment
Follow-up Module/s: Phase-out module since: 18.01.2022
  • without Follow-up Module/s