After a brief review of the early years of integrated circuits, we will focus on the manufacturing processes of integrated circuits. This includes the extraction of silicon, the production of wafers, the processing of wafers by doping and applying conductive and insulating layers. Special attention is paid here to modern photolithography.

In the 3rd section the exact process sequence and the technology cross section of a CMOS technology with Shallow-Trench-Isolation are discussed. The connection between the mask steps and the layers of the design system used in the practical course is explained. In addition, a process simulation in individual steps is explained.

The 3rd section concludes with an overview of the active and passive components available in our technology as well as their circuit and layout realisation in the design system.

Chapter 4 of the lecture is a repetition of the contents of the Analog Circuits module relevant for this module. The repetition includes the MOS transistor, source circuit, current mirror, differential stage, feedback, 2-stage OP, stability. This is completed by a discussion on the dimensioning of 2-stage OPs.

The 5th section explains how the circuit simulator SPICE works and how to work with models and libraries. This includes advanced node analysis, numerical integration, convergence and accuracy in DC simulation, numerical integration in transient analysis. The possibilities and applications of different analytical techniques, including small-signal noise simulation, will be discussed.

Chapter 6 concludes with an introduction to requirements for the analog CMOS layout and a transition to the nanometer CMOS layout in the Mixed-Signal IC Design (MIC, formerly SKE2) module. Here the term matching is explained, as well as its practical meaning with resistors, capacities and MOS transistors.